MediaTek has reoriented its artificial intelligence strategy from focused IC and ASIC work to a broader system-level design posture, according to TF International Securities analyst Ming-Chi Kuo. The firm is initially pursuing two concrete system targets: the PCBA (L6) for Google's TPU line and rack-level (L10) integration for AI chips being developed by companies linked to Elon Musk.
Kuo described the development in direct terms: "My latest industry checks indicate that MediaTek has upgraded the strategic positioning of its AI business from 'IC / ASIC design' to 'system-level design,' initially targeting the PCBA (L6) for Google's TPU and the L10 rack for Elon Musk-affiliated companies' in-house AI chips." He emphasizes that the repositioning is intended as a long-range strategy rather than a source of immediate earnings upside, noting it carries "immaterial impact on fundamentals over the next two years."
Underlying the pivot is a clear margin objective. TF International expects MediaTek to chase gross margins in the 40-50% range for its system-level business. The proposed approach is asset-light: MediaTek would retain responsibility for design and validation, leverage Taiwan's hardware supply chain, and outsource manufacturing. That combination would let the company capture the engineering and integration premium of rack-level systems without investing directly in capital-intensive production facilities.
Kuo points to two structural industry drivers that make the timing sensible. First, server rack design is becoming more complex as technologies like co-packaged optics (CPO) and 800V high-voltage direct current (HVDC) power distribution are adopted, elevating the engineering value of system-level work. Second, refresh cycles for AI server infrastructure are starting to look more like those in consumer electronics, producing more frequent windows for design wins for companies that can demonstrate deep system integration capabilities.
However, the two initial targets present different entry barriers. Kuo is candid about Google: "Google's hardware assembly ecosystem is already well-established, so MediaTek's chances of winning L10 are slim." MediaTek's more feasible route into Alphabet's TPU family is at the PCBA level, with Kuo pointing to TPU v10, codenamed Icefish, as the likely starting point. Alongside that effort, MediaTek would pursue integration of its own CPO solution.
By contrast, the opportunity tied to Musk-affiliated companies has a different structure. Kuo notes that current AI compute deployments by those companies are built mainly around Nvidia chips, and, as a result, the assembly ecosystem for their own AI chip racks is not yet established. That nascent supply chain creates a potential opening for MediaTek to provide rack-level assembly and integration. Kuo adds a caution: long-term success depends on whether MediaTek can harness Taiwan's hardware ecosystem and its partnership with Terafab to secure L10 rack orders, and the timeline for converting that opportunity into revenue remains unclear.
The strategic logic for the move, Kuo argues, is coherent with broader industry trends. "This strategic shift aligns with industry trends and, if executed well, should help strengthen MediaTek's customer relationships and long-term competitive advantage," he wrote. The intent is to capture new growth avenues while also hedging against risk in existing lines of business.
TF International highlights a central risk that underpins the rationale for the system-level pivot: the potential erosion of growth in MediaTek's current ASIC design engine. The firm warns that momentum in ASIC design could begin to slow in two to three years as the Semi-COT (semiconductor chip-on-trend) business model spreads across the industry. That prospect is a principal reason the analyst views system-level work as a necessary hedge, even if it contributes little to near-term revenue.
Market context for the shift includes ongoing investor attention to AI infrastructure spending, with Alphabet's TPU roadmap watched as a signal of the company's intent to reduce reliance on third-party silicon. For MediaTek, Kuo's assessment provides a lens on how Taiwan's chip design leaders are moving to compete at the rack-integration layer that is increasingly strategic in AI hardware.
Looking ahead, the clearest near-term milestone is qualification progress on TPU v10 (Icefish). Successful qualification would represent MediaTek's first tangible foothold in the system-level category Kuo outlines. The Musk-affiliated opportunity, by contrast, should be treated as optionality: its timeline remains opaque and is not guaranteed to contribute to revenue in the near term.
Kuo frames the effort as a multi-year repositioning whose returns, if realized, would show up in deeper customer relationships and a stronger competitive moat rather than in immediate quarterly earnings gains. The company aims to capture the engineering premium of increasingly complex racks while maintaining an asset-light stance that avoids heavy manufacturing investments.
Summary
MediaTek has elevated its AI strategy from IC and ASIC design to system-level integration, targeting the PCBA for Google's TPU v10 and rack-level work for Musk-affiliated AI chips. TF International Securities' Ming-Chi Kuo describes the move as a long-term strategic repositioning designed to capture higher margins through an asset-light model, while warning it is unlikely to materially affect fundamentals in the next two years.
Key points
- MediaTek is shifting from IC/ASIC design to system-level design, initially pursuing TPU PCBA (L6) and rack-level (L10) opportunities.
- The company aims for 40-50% gross margins in system-level work by leading design and validation while outsourcing manufacturing and leveraging Taiwan's supply chain.
- Structural tailwinds include greater rack-level engineering complexity from CPO and 800V HVDC, and shorter refresh cycles for AI infrastructure that increase design-win frequency.
Risks and uncertainties
- MediaTek's chance of winning Google L10 rack orders is viewed as slim, making the PCBA level the more realistic entry point for TPU v10 (Icefish) - this affects the company-specific and server hardware sectors.
- The Musk-affiliated rack opportunity depends on nascent assembly ecosystems and MediaTek's ability to leverage Taiwan's supply chain and a Terafab partnership - timeline visibility is limited, affecting AI infrastructure and hardware supply chains.
- TF International warns ASIC design growth may slow in two to three years as the Semi-COT model spreads, posing a risk to MediaTek's current growth engine in semiconductor design.