Press Releases May 19, 2026 09:00 AM

Silvaco Announces Immediate Availability of Mixel MIPI C-PHY/D-PHY Combo IP on TSMC N2P Process

Silvaco launches advanced Mixel MIPI C-PHY/D-PHY IP on TSMC's cutting-edge N2P process targeting power-efficient AR and wearable applications.

By Nina Shah SVCO

Silvaco Group announces immediate availability of the Mixel MIPI C-PHY/D-PHY Combo IP optimized for TSMC's N2P process, supporting latest MIPI standards with enhanced power efficiency and reduced wire count. This IP targets next-generation applications requiring low power and minimal area, such as augmented reality glasses and wearables, demonstrating Silvaco's commitment to advanced semiconductor IP solutions.

Silvaco Announces Immediate Availability of Mixel MIPI C-PHY/D-PHY Combo IP on TSMC N2P Process
SVCO

Key Points

  • Launch of Mixel MIPI C-PHY/D-PHY Combo IP on TSMC's advanced N2P process enabling high-speed, low-power physical layer IP.
  • Supports latest MIPI specifications with embedded clock mode, reducing wire count by 25%, benefiting devices with extreme form factor constraints like AR glasses.
  • Silvaco strengthens its semiconductor IP portfolio for leading-edge processes targeting markets including AR, wearables, mobile, automotive, and high-performance computing.
  • Sectors impacted include semiconductor design and manufacturing, consumer electronics (AR/wearables), mobile devices, and automotive electronics.

SAN JOSE, Calif., May 19, 2026 (GLOBE NEWSWIRE) -- Silvaco Group, Inc. (Nasdaq: SVCO) (“Silvaco”), a provider of AI-enabled TCAD and EDA solutions, and SIP solutions that enable semiconductor design and digital twin modeling through AI software and innovation, announces the immediate availability of Mixel™ MIPI® C-PHY™/D-PHY™ Combo Universal IP on TSMC’s industry-leading N2P process. The MIPI C-PHY IP supports the v2.1 specification, and the MIPI D-PHY IP supports the v3.6 specification.

The Mixel MIPI C-PHY/D-PHY Combo Universal IP is a physical layer specifically optimized for low power, low leakage, and minimal area. In an industry first, this IP supports MIPI D-PHY with embedded clock mode (ECM), a new mode first released in the MIPI D-PHY v3.5 specification and carried forward in v3.6. The Mixel IP supports speeds up to 3.0 Gbps per lane in D-PHY mode over two wires, compared to a traditional MIPI D-PHY interface requiring a minimum of four wires with a forwarded-clock mode. The combo IP also supports the MIPI C-PHY v2.1 specification at 3.0 Gsps per trio, an equivalent data rate of 6.84 Gbps/trio. As a universal IP, it is the superset configuration that includes a high-speed transmitter and receiver supporting full-speed loopback.

This IP was specifically designed for use cases where power efficiency, minimal area, low EMI, and low heat dissipation are critical—without compromising performance. Such applications include augmented reality (AR) glasses and wearables. By leveraging the latest features available in the MIPI specification, the Mixel MIPI C-PHY/D-PHY ECM combo achieves the same throughput with 25% fewer wires compared to a standard MIPI C-PHY/D-PHY combo with a forwarded-clock D-PHY IP. The reduced wire count is beneficial for use cases with extreme form factor constraints such as AR glasses where all wires need to fit inside a lens frame.

“Mixel, now part of Silvaco, has long been a valued contributing member of the MIPI Alliance,” said Hezi Saar, chair of MIPI Alliance. “It is great to see these two companies combining their strengths to deliver MIPI C-PHY and D-PHY solutions on TSMC’s advanced N2P process.”

Mixel was the first IP provider to demonstrate silicon-proven MIPI C-PHY with its MIPI C-PHY/D-PHY combo IP in 2016. Mixel’s MIPI PHY IP has been silicon-proven in 10 different TSMC process nodes including N6 and N5.

“We are excited to announce immediate availability of our next-generation MIPI C-PHY/D-PHY IP on TSMC’s N2P process, the advanced Nanosheet technology delivering industry-leading performance and energy efficiency,” said Andy Wright, SVP and GM of Silvaco Semiconductor IP. “This demonstrates our ongoing commitment to expand our portfolio to the leading-edge processes, providing customers with high-performance, reliable solutions for next-generation applications.”

Availability:

Mixel MIPI C-PHY/D-PHY Combo IP is available now on TSMC N2P process. For more information on Mixel’s IP portfolio, please visit https://mixel.com/ip-cores/.

About Silvaco Group, Inc.
Silvaco is a provider of AI-driven TCAD and EDA solutions, and SIP solutions that enable semiconductor design and digital twin modeling through AI software and innovation. Silvaco’s solutions are used for semiconductor and photonics processes, devices, and systems development across display, power devices, automotive, memory, high performance compute, foundries, photonics, internet of things, and 5G/6G mobile markets for complex SoC design. Silvaco is headquartered in Santa Clara, California, and has a global presence with offices located in North America, Europe, Brazil, China, Japan, Korea, Singapore, and Taiwan. Learn more at silvaco.com.

About Mixel:

Mixel, a Silvaco company, is a provider of mixed-signal IPs and offers a wide portfolio of high-performance mixed-signal connectivity IP solutions. Mixel’s mixed-signal portfolio includes PHYs and SerDes, such as MIPI D-PHY, MIPI M-PHY, MIPI C-PHY, Automotive SerDes Alliance (ASA) Motion Link SerDes, LVDS, and many dual mode PHY supporting multiple standards. Mixel was founded in 1998 and is headquartered in San Jose, CA, with global operation to support a worldwide customer base. Learn more at mixel.com.

About MIPI Alliance:

MIPI Alliance (MIPI) develops standardized wired interface specifications for mobile and other connected ecosystems. Founded in 2003, the organization has over 375 member companies worldwide and more than 15 active working groups delivering specifications within the extended mobile ecosystem. Members of the organization include handset manufacturers, device OEMs, software providers, semiconductor companies, application processor developers, IP tool providers, automotive OEMs and Tier 1 suppliers, and test and test equipment companies, as well as camera, display, tablet and laptop manufacturers. For more information, please visit www.mipi.org.

MIPI® and M-PHY® are registered trademarks owned by MIPI Alliance. C-PHY™ and D-PHY™ are trademarks of MIPI Alliance.

Investor Relations:
Greg McNiff
[email protected]

Media Relations:
[email protected]


Risks

  • Adoption of Silvaco's new IP depends on customer acceptance and integration into emerging semiconductor designs, which may face competition from rival IP providers.
  • Technical challenges or delays in production-level deployment on TSMC's N2P process could impact the product's market penetration.
  • Market demand for AR and ultra-compact wearable devices remains evolving and uncertain, potentially affecting IP sales growth.

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