Press Releases April 7, 2026 08:00 PM

Applied Materials Introduces Deposition Systems for Angstrom-Era Logic Chips

Applied Materials Launches Advanced Deposition Systems to Enable Next-Gen 2nm+ Gate-All-Around Logic Chips for AI Applications

By Maya Rios AMAT
Applied Materials Introduces Deposition Systems for Angstrom-Era Logic Chips
AMAT

Applied Materials introduced two new chipmaking systems—the Precision Selective Nitride PECVD and the Trillium ALD—that deliver atomic-level material deposition precision for creating complex 3D Gate-All-Around transistors at 2nm and below. These innovations address the challenges of scaling AI chips by improving transistor performance, power efficiency, and manufacturing reliability, supporting the growing demand for advanced AI compute infrastructure.

Key Points

  • The Precision Selective Nitride PECVD system enhances shallow trench isolation in advanced transistors, reducing parasitic capacitance and improving performance-per-watt.
  • The Trillium ALD system enables atomic-scale uniform metal gate deposition around silicon nanosheets, optimizing transistor threshold voltage for various AI workloads and boosting chip reliability.
  • Both systems are already being adopted by leading logic chipmakers for 2nm and beyond nodes, positioning Applied Materials at the forefront of semiconductor manufacturing innovation for AI-driven markets.
  • Chipmaking systems create the smallest atomic-scale features in 3D Gate-All-Around transistors
  • Precision™ Selective Nitride PECVD preserves integrity of shallow trench isolation, reducing parasitic capacitance and boosting chip performance-per-watt
  • Trillium™ ALD wraps silicon nanosheets with complex metal gate stacks that optimize transistors for a wide range of AI computing applications
  • The new systems are being used by leading foundry-logic manufacturers at 2nm and beyond

SANTA CLARA, Calif., April 08, 2026 (GLOBE NEWSWIRE) -- Applied Materials, Inc., the leader in materials engineering for the semiconductor industry, today introduced two chipmaking systems designed to create the smallest features in the world’s most advanced logic chips. By controlling materials deposition with atomic-level precision, the technologies enable chipmakers to build faster and more power-efficient transistors at the scale required to sustain the pace of today’s global AI infrastructure buildout.

Driven by surging demand for AI compute, the semiconductor industry is pushing the limits of scaling to squeeze more energy-efficient performance from each of the hundreds of billions of transistors in a processor chip. To address this challenge, the world’s leading logic chipmakers are introducing new Gate-All-Around (GAA) transistors at 2nm and beyond. The GAA transition enables much higher performance at the same power, but achieving these gains comes with dramatically higher process complexity. Building the complicated 3D structures inside a GAA transistor takes more than 500 process steps, many of which require entirely new ways of depositing materials with precision, repeatability and control – all within tolerances approaching the size of individual atoms.

Applied today unveiled two chipmaking systems that leverage material innovations to create some of the most complex features associated with GAA transistors. The new technologies enable deposition of metals and insulating dielectrics – essential materials that dramatically impact the performance and power efficiency of advanced chips.

“Our industry is entering a period of rapid, non‑linear change, where traditional lithographic chip scaling alone is no longer sufficient,” said Dr. Prabu Raja, President of the Semiconductor Products Group at Applied Materials. “At the most advanced angstrom-class logic nodes, performance and power are increasingly determined by materials. Thanks to our foundational leadership in materials engineering, these deposition systems will enable our customers to deliver critical transistor inflections that are foundational to the AI computing roadmap.”

Precision™ Selective Nitride PECVD System Preserves Integrity of Shallow Trench Isolation

Next-generation AI GPUs now in development are expected to pack more than 300 billion transistors into a space the size of a postage stamp. Without proper isolation, electrons can easily diffuse into neighboring transistors, leading to parasitic capacitance, an unintended electrical drag between transistors that slows signals, wastes power and negatively impacts a chip’s performance-per-watt.

In advanced transistor architectures, shallow trench isolation (STI) is used to electrically separate neighboring transistors. With this technique, a trench is etched into the surface between transistors and then filled with an insulating dielectric material such as silicon oxide, which keeps electrical charge confined and prevents unwanted leakage. These narrow isolation trenches are some of the smallest structures in a GAA device, making it difficult to maintain isolation quality during high-volume manufacturing. Once these trenches are formed, the chip goes through many additional processing steps, and over time those steps can gradually wear down the silicon oxide isolation material, negatively impacting overall chip performance.

The Applied Producer™ Precision™ Selective Nitride PECVD* system uses an industry-first selective bottom-up deposition process to place silicon nitride only where it’s needed in the trench. It deposits a dense silicon nitride layer on top of the silicon oxide, which helps the isolation withstand later processing steps that would otherwise recess the STI material. The process operates at low temperatures to avoid any damage to the underlayer film or structure. By preserving the original shape and height of the isolation trench, Precision Selective Nitride helps maintain consistent electrical behavior, reducing parasitic capacitance, lowering leakage, and boosting overall device performance.

The Precision Selective Nitride PECVD system is now being adopted by leading logic chipmakers at 2nm and below GAA process nodes.

Trillium™ ALD System Builds Complex Metal Gate Structures with Atomic-Scale Uniformity

Each GAA transistor is a switch controlled by a gate stack composed of multiple layers of metal that determine the threshold voltage needed to turn the transistor on and off. To meet the unique needs of different AI workloads, from the data center to the edge, chipmakers provide designers with a range of transistor options, with some tuned to switch faster for peak performance and others tuned to switch using the lowest amount of power. Meeting these trade-offs comes down to metal gate stack optimization based on high-precision metal deposition.

In GAA transistors, the gate stack needs to completely surround multiple horizontal nanosheets spaced only around 10 nanometers apart – equivalent to around 1/10,000 the width of a human hair. Any gaps or non-uniformities in the gate stack can cause variability in the transistor’s switching characteristics and negatively impact chip performance, power consumption, reliability and yield. Conventional metal deposition approaches struggle to meet these extreme requirements.

The Applied Endura™ Trillium™ ALD** system is an Integrated Materials Solution™ designed to precisely deposit metals in the most complex GAA transistor gate stacks. The system harnesses Applied’s legacy of leadership in metal ALD technology for advanced transistor applications. By integrating multiple metal deposition steps in a single platform, Trillium gives chipmakers the flexibility to tune threshold voltage across different transistors. Trillium leverages the proven Endura platform – the most successful metallization system in the history of the semiconductor industry – to create and maintain an extraordinarily high vacuum. This vacuum keeps wafers protected from impurities in the cleanroom atmosphere, which is critical when depositing multiple materials in the miniscule space between silicon nanosheets. By providing angstrom-level thickness control of metal gate stack layers, Trillium ALD delivers the tunability and reliability advanced GAA transistors demand, while improving transistor performance, power and reliability.

Applied’s Trillium ALD system has been an established benchmark for metal gate stack deposition at multiple generations of FinFET process nodes. The system has been highly tailored for GAA applications with new features to enable thinner work function metals and volume-less dipole materials that address the limited space in GAA structures, and it is now being adopted by leading logic chipmakers at 2nm and below GAA process nodes.

A media kit with additional information on the Trillium ALD and Precision Selective Nitride systems is available on the Applied Materials website. Further details about Applied’s advanced logic technologies will be provided at the company’s Logic Master Class being held later today.

* PECVD = Plasma Enhanced Chemical Vapor Deposition
**ALD = Atomic Layer Deposition

About Applied Materials
Applied Materials, Inc. (Nasdaq: AMAT) is the leader in materials engineering solutions that are at the foundation of virtually every new semiconductor and advanced display in the world. The technology we create is essential to advancing AI and accelerating the commercialization of next-generation chips. At Applied, we push the boundaries of science and engineering to deliver material innovation that changes the world. Learn more at www.appliedmaterials.com.

Contact:
Ricky Gradwohl (Media) 408.235.4676
Mike Sullivan (Financial Community) 408.986.7977


Risks

  • Complexity of manufacturing 3D GAA transistors could lead to yield or reliability issues despite new systems, impacting end-product performance and costs.
  • Adoption depends on success of 2nm and smaller logic nodes; any delays or challenges in node development by chipmakers could slow market uptake of Applied's new systems.
  • Rapid evolution in semiconductor technology and competition from other equipment suppliers may pressure Applied Materials to continuously innovate to maintain leadership.

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